Invention Grant
- Patent Title: Iterative detection and decoding circuit, iterative detection and decoding method and MIMO receiver
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Application No.: US16455956Application Date: 2019-06-28
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Publication No.: US11431440B2Publication Date: 2022-08-30
- Inventor: Chia-Hsiang Yang , Yao-Pin Wang , Chi-Chih Wen , Der-Zheng Liu , Chung-Jung Huang
- Applicant: Realtek Semiconductor Corporation
- Applicant Address: TW Hsinchu
- Assignee: Realtek Semiconductor Corporation
- Current Assignee: Realtek Semiconductor Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Locke Lord LLP
- Agent Tim Tingkang Xia, Esq.
- Priority: TW108108968 20190315
- Main IPC: H04L1/00
- IPC: H04L1/00 ; H04B7/08
Abstract:
An iterative detection and decoding (IDD) circuit is provided. The iterative detection and decoding (IDD) circuit is configured to perform M outer iterations on a received signal, and Ni inner iterations are performed during the ith outer iteration of the M outer iterations, where M is an integer greater than 1, i is an integer less than or equal to M, and N1 to NM are integers and include at least two different values.
Public/Granted literature
- US20200295864A1 ITERATIVE DETECTION AND DECODING CIRCUIT, ITERATIVE DETECTION AND DECODING METHOD AND MIMO RECEIVER Public/Granted day:2020-09-17
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