Invention Grant
- Patent Title: Flipped-conductor-patch lamination for ultra fine-line substrate creation
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Application No.: US16186872Application Date: 2018-11-12
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Publication No.: US11432402B2Publication Date: 2022-08-30
- Inventor: John Adam Tracy deMercleden Smithells , Nina Biddle
- Applicant: Microchip Technology Caldicot Limited
- Applicant Address: GB Caldicot
- Assignee: Microchip Technology Caldicot Limited
- Current Assignee: Microchip Technology Caldicot Limited
- Current Assignee Address: GB Caldicot
- Agency: Glass and Associates
- Agent Kenneth D'Alessandro; Kenneth Glass
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/02 ; H05K1/14 ; H05K1/18 ; H05K1/03

Abstract:
A lamination circuit board structure lamination circuit board structure includes a printed circuit board substrate including conductive wiring traces on at least a first wiring face, a prepreg layer formed over the first wiring face, and a patch having an area smaller than 1,000 mm2. The patch includes conductive wiring traces formed on a wiring face and is laminated to the printed circuit board substrate over the prepreg layer, oriented with the wiring face in contact with and pressed into the prepreg layer. Portions of the prepreg layer fill interstices between the conductive wiring traces.
Public/Granted literature
- US20210092842A9 Flipped-Conductor-Patch Lamination for Ultra Fine-Line Substrate Creation Public/Granted day:2021-03-25
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