Invention Grant
- Patent Title: Dynamic memory address write policy translation based on performance needs
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Application No.: US16521385Application Date: 2019-07-24
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Publication No.: US11435944B2Publication Date: 2022-09-06
- Inventor: Giuseppe Cariello , Jonathan Scott Parry
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Greenberg Traurig
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/06

Abstract:
Systems and methods of memory operation involving dynamic adjustment of write policy based on performance needs are disclosed. In one embodiment, an exemplary method may comprise monitoring memory performance parameters related to a programming operation being scheduled, selecting a write policy based on the memory performance parameters monitored, executing a memory control process that is configured to switch between a first addressing scheme and a second addressing scheme, and programming a first superpage of the programming operation using the first addressing scheme and programing a second superpage of the programming operation using the second addressing scheme.
Public/Granted literature
- US20210026557A1 DYNAMIC MEMORY ADDRESS WRITE POLICY TRANSLATION BASED ON PERFORMANCE NEEDS Public/Granted day:2021-01-28
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