An arithmetic processing device includes a plurality of arithmetic processing circuitry, each of which includes: an instruction hold circuit configured to hold an arithmetic instruction; an arithmetic circuit configured to execute an arithmetic instruction issued from the instruction hold circuit; and a measurement circuit configured to measure a predetermined time period, wherein the instruction hold circuit is configured to perform first processing after the instruction hold circuit holds a first arithmetic instruction when the arithmetic circuit is not executing other arithmetic instructions, the first processing being configured to: cause the measurement circuit to initiate the measurement of the predetermined time; and issue, in response to a completion of the measurement of the predetermined time period, the held first arithmetic instruction to the arithmetic circuit, and wherein the predetermined time period measured by the measurement circuit is different between at least two of the plurality of arithmetic processing circuitry.