Invention Grant
- Patent Title: Error control for content-addressable memory
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Application No.: US16553731Application Date: 2019-08-28
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Publication No.: US11436071B2Publication Date: 2022-09-06
- Inventor: Ameen D. Akel , Sean S. Eilert
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G06F11/07 ; G06F11/10 ; G11C15/04 ; G11C11/409

Abstract:
Methods, systems, and devices for error correction for content-addressable memory (CAM) are described. A CAM may store bit vectors as a set of subvectors, which each subvector stored in an independent aspect of the CAM, such as in a separate column or array of memory cells within the CAM. The CAM may similarly segment a queried input bit vector and identify, for each resulting input subvector, whether a matching subvector is stored by the CAM. The CAM may identify a match for the input bit vector when the number of matching subvectors satisfies a threshold. The CAM may validate a match based on comparing a stored bit vector corresponding to the identified match to the input bit vector. The stored bit vector may undergo error correction and may be stored in the CAM or another memory array, such as a dynamic random access memory (DRAM) array.
Public/Granted literature
- US20210064455A1 Error correction for content-addressable memory Public/Granted day:2021-03-04
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