A processor comprises an execution unit operable to execute programs to perform processing operations, and one or more slave accelerators each operable to perform respective processing operations under the control of the execution unit. The execution unit includes a message generation circuit that generates messages to cause a slave accelerator to perform a processing operation. The message generation circuit fetches data values for including in a message or messages to be sent to a slave accelerator into local storage of the message generation circuit pending the inclusion of those data values in a message that is sent to a slave accelerator, and retrieves the data value or values from the local storage, and sends a message including the retrieved data value or values to the slave accelerator.