Invention Grant
- Patent Title: Memory device current limiter
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Application No.: US17240534Application Date: 2021-04-26
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Publication No.: US11437099B2Publication Date: 2022-09-06
- Inventor: Chung-Cheng Chou , Tien-Yen Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Merchant & Gould, P.C.
- Main IPC: G11C13/00
- IPC: G11C13/00

Abstract:
A memory device includes a memory array including a plurality of memory cells arranged in rows and columns. A closed loop bias generator is configured to output a column select signal to the memory array. A current limiter receives an output of the closed loop bias generator. The current limiter is coupled to a plurality of the columns of the memory array.
Public/Granted literature
- US20210249075A1 MEMORY DEVICE CURRENT LIMITER Public/Granted day:2021-08-12
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