Invention Grant
- Patent Title: Capacitive sense NAND memory
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Application No.: US17111729Application Date: 2020-12-04
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Publication No.: US11437106B2Publication Date: 2022-09-06
- Inventor: Yoshiaki Fukuzumi , Jun Fujiki , Shuji Tanaka , Masashi Yoshida , Masanobu Saito , Yoshihiko Kamata
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G11C11/04
- IPC: G11C11/04 ; G11C16/26 ; G11C16/04

Abstract:
An array of memory cells might include a first data line, a second data line, a source, a capacitance selectively connected to the first data line, a string of series-connected non-volatile memory cells between the first data line and the capacitance, and a pass gate selectively connected between the second data line and the source, wherein an electrode of the capacitance is capacitively coupled to a channel of the pass gate.
Public/Granted literature
- US20220180937A1 CAPACITIVE SENSE NAND MEMORY Public/Granted day:2022-06-09
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