Invention Grant
- Patent Title: Hybrid memory structure
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Application No.: US17033945Application Date: 2020-09-28
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Publication No.: US11437347B2Publication Date: 2022-09-06
- Inventor: Chen-Liang Ma , Zih-Song Wang
- Applicant: Powerchip Semiconductor Manufacturing Corporation
- Applicant Address: TW Hsinchu
- Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Priority: TW109130199 20200903
- Main IPC: H01L27/11563
- IPC: H01L27/11563 ; H01L25/065 ; H01L27/24 ; H01L27/11558
Abstract:
A hybrid memory structure including a substrate, a flash memory, a first resistive random access memory (RRAM), and a second RRAM is provided. The flash memory is located on the substrate. The flash memory includes a gate, a first doped region, and a second doped region. The gate is located on the substrate. The first doped region is located in the substrate on one side of the gate. The second doped region is located in the substrate on another side of the gate. The first RRAM is electrically connected to one of the gate, the first doped region, and the second doped region. The second RRAM is electrically connected to another of the gate, the first doped region, and the second doped region.
Public/Granted literature
- US20220068878A1 HYBRID MEMORY STRUCTURE Public/Granted day:2022-03-03
Information query
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