Invention Grant
- Patent Title: Method of manufacturing semiconductor device having a plurality of channel layers
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Application No.: US17030841Application Date: 2020-09-24
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Publication No.: US11437377B2Publication Date: 2022-09-06
- Inventor: Woo Cheol Shin , Myung Gil Kang , Sadaaki Masuoka , Sang Hoon Lee , Sung Man Whang
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Lee IP Law, P.C.
- Priority: KR10-2019-0000559 20190103
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/66 ; H01L29/06 ; H01L29/78 ; H01L29/04 ; H01L21/02 ; H01L29/16 ; H01L21/8238

Abstract:
A semiconductor device includes a first semiconductor layer having first and second regions, a plurality of first channel layers spaced apart from each other in a vertical direction on the first region of the first semiconductor layer, a first gate electrode surrounding the plurality of first channel layers, a plurality of second channel layers spaced apart from one another in the vertical direction on the second region of the first semiconductor layer, and a second gate electrode surrounding the plurality of second channel layers, wherein each of the plurality of first channel layers has a first crystallographic orientation, and each of the plurality of second channel layers has a second crystallographic orientation different from the first crystallographic orientation, and wherein a thickness of each of the plurality of first channel layers is different from a thickness of each of the plurality of second channel layers.
Public/Granted literature
- US20210020638A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING A PLURALITY OF CHANNEL LAYERS Public/Granted day:2021-01-21
Information query
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