Invention Grant
- Patent Title: Methods for making bipolar junction transistors including emitter-base and base-collector superlattices
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Application No.: US16913487Application Date: 2020-06-26
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Publication No.: US11437486B2Publication Date: 2022-09-06
- Inventor: Richard Burton
- Applicant: Atomera Incorporated
- Applicant Address: US CA Los Gatos
- Assignee: Atomera Incorporated
- Current Assignee: Atomera Incorporated
- Current Assignee Address: US CA Los Gatos
- Agency: Allen, Dyer, Doppelt + Gilchrist, P.A.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/08 ; H01L29/732 ; H01L29/15 ; H01L29/10

Abstract:
A method for making a bipolar junction transistor (BJT) may include forming a first superlattice on a substrate defining a collector region therein. The first superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a base on the first superlattice, and forming a second superlattice on the base comprising a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming an emitter on the second superlattice.
Public/Granted literature
- US20210217875A1 METHODS FOR MAKING BIPOLAR JUNCTION TRANSISTORS INCLUDING EMITTER-BASE AND BASE-COLLECTOR SUPERLATTICES Public/Granted day:2021-07-15
Information query
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