Invention Grant
- Patent Title: Transistor and display device
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Application No.: US17042900Application Date: 2018-03-30
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Publication No.: US11437520B2Publication Date: 2022-09-06
- Inventor: Tadayoshi Miyamoto , Yoshinobu Nakamura
- Applicant: SHARP KABUSHIKI KAISHA
- Applicant Address: JP Sakai
- Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee: SHARP KABUSHIKI KAISHA
- Current Assignee Address: JP Sakai
- Agency: ScienBiziP, P.C.
- International Application: PCT/JP2018/013810 WO 20180330
- International Announcement: WO2019/187069 WO 20191003
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L29/00 ; H01L29/786 ; H01L23/522 ; H01L27/12 ; H01L29/66

Abstract:
The transistor includes a first insulating film, an oxide semiconductor layer, a gate insulating film, an upper gate electrode, and a second insulating film being sequentially layered on a substrate, and the transistor includes a light blocking layer layered on the second insulating film and formed of metal. The light blocking layer is electrically connected to the upper gate electrode by interposing a gate contact hole provided in the second insulating film. The oxide semiconductor layer is configured such that a region overlapping with the upper gate electrode entirely overlaps with the light blocking layer.
Public/Granted literature
- US20210057583A1 TRANSISTOR AND DISPLAY DEVICE Public/Granted day:2021-02-25
Information query
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