Invention Grant
- Patent Title: Inter-layer slot for increasing printed circuit board power performance
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Application No.: US17081916Application Date: 2020-10-27
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Publication No.: US11439002B2Publication Date: 2022-09-06
- Inventor: Mingyi Yu , Ananta H. Attaluri , Gregory Patrick Bodi , Carmen A. Capillo, Jr. , Michael James Warner
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K3/00 ; H05K3/42
Abstract:
A printed circuit board includes a first voltage plane disposed on a first surface of a first electrically insulating layer and a second voltage plane. An inter-layer slot that is formed through the first electrically insulating layer and includes an electrically conductive material electrically couples the first voltage plane to the second voltage plane.
Public/Granted literature
- US20210127479A1 INTER-LAYER SLOT FOR INCREASING PRINTED CIRCUIT BOARD POWER PERFORMANCE Public/Granted day:2021-04-29
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