Invention Grant
- Patent Title: Solid-state imaging device
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Application No.: US17262083Application Date: 2019-08-26
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Publication No.: US11445138B2Publication Date: 2022-09-13
- Inventor: Kazutoshi Tomita , Shinichirou Etou
- Applicant: Sony Semiconductor Solutions Corporation
- Applicant Address: JP Kanagawa
- Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Michael Best & Friedrich LLP
- Priority: JPJP2018-161788 20180830,JPJP2018-210684 20181108
- International Application: PCT/JP2019/033396 WO 20190826
- International Announcement: WO2020/045373 WO 20200305
- Main IPC: H04N5/3745
- IPC: H04N5/3745 ; H04N5/369

Abstract:
A solid-state imaging device configured to suppress fixed pattern noise having column correlation and/or lateral correlation from being generated in images is disclosed. In one example, a solid-state imaging device includes unit pixels arranged in row and column directions, vertical signal lines respectively connected to at least one of the unit pixels arranged in the column direction, first converters connected to the respective vertical signal lines and configured to convert an analog pixel signal into a digital pixel signal in reading each unit pixel arranged in the row direction, an initialization voltage generator that outputs an initialization voltage for initializing the unit pixels or input nodes of the first converters, and an initialization voltage line that connects the initialization voltage generator and the first converters. The initialization voltage generator changes the initialization voltage that is output for each row and/or column to be processed by the first converters.
Public/Granted literature
- US20210306587A1 SOLID-STATE IMAGING DEVICE Public/Granted day:2021-09-30
Information query
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