A charge compensation circuit of the present disclosure includes: a sorting sub-circuit, configured to sort inputted initial data voltages according to a pixel structure type to obtain a plurality of channels of data, each channel of the data including initial data voltages corresponding to all data lines when a gate line in a row corresponding to the channel is turned on; a storage comparison sub-circuit, configured to output many sets of comparison data according to the stored data; a lookup sub-circuit, configured to look up actual compensation data corresponding to the set of comparison data; and a compensation sub-circuit, configured to compensate for the initial data voltage on a data line corresponding to the actual compensation data when the gate line in the current row is turned on, to obtain an actual data voltage on the data line when the gate line in the current row is turned on.