Invention Grant
- Patent Title: Semiconductor structure with an epitaxial layer
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Application No.: US17218112Application Date: 2021-03-30
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Publication No.: US11450747B2Publication Date: 2022-09-20
- Inventor: Hsiao-Pang Chou , Hon-Huei Liu , Ming-Chang Lu , Chin-Fu Lin , Yu-Cheng Tung
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: CN201811517688.5 20181212
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/20 ; H01L21/02 ; H01L29/06 ; H01L21/308 ; H01L21/306 ; H01L23/00 ; H01L33/00 ; H01L33/12 ; H01L33/16 ; H01L29/165
Abstract:
The present invention discloses a semiconductor structure with an epitaxial layer, including a substrate, a blocking layer on said substrate, wherein said blocking layer is provided with predetermined recess patterns, multiple recesses formed in said substrate, wherein each of said multiple recesses is in 3D diamond shape with a centerline perpendicular to a surface of said substrate, a buffer layer on a surface of each of said multiple recesses, and an epitaxial layer comprising a buried portion formed on said buffer layer in each of said multiple recesses and only one above-surface portion formed directly above said blocking layer and directly above said recess patterns of said blocking layer, and said above-surface portion directly connects said buried portion in each of said multiple recesses, and a first void is formed inside each of said buried portions of said epitaxial layer in said recess.
Public/Granted literature
- US20210242018A1 SEMICONDUCTOR STRUCTURE WITH AN EPITAXIAL LAYER Public/Granted day:2021-08-05
Information query
IPC分类:
