Invention Grant
- Patent Title: Using flag qubits for fault-tolerant implementations of topological codes with reduced frequency collisions
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Application No.: US16512143Application Date: 2019-07-15
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Publication No.: US11455207B2Publication Date: 2022-09-27
- Inventor: Christopher Chamberland , Guanyu Zhu , Theodore James Yoder , Andrew W. Cross
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Venable LLP
- Agent Henry J. Daley
- Main IPC: G06N10/00
- IPC: G06N10/00 ; G06F11/10

Abstract:
A method of error correction for a quantum computer includes identifying each of a plurality of physical qubits arranged in a lattice pattern over a surface in a quantum processor of the quantum computer as a one of a data qubit, an ancilla qubit or a flag qubit to define a plurality of data qubits, ancilla qubits and flag qubits. Each pair of interacting data qubits interact with a flag qubit and adjacent flag qubits both interact with a common ancilla qubit. The method further includes performing measurements of weight-four stabilizers, weight-two stabilizers, or both of a surface code formed using at least a sub-plurality of the plurality of physical qubits, or performing measurements of weight-four Bacon-Shor type gauge operators; and correcting fault-tolerantly quantum errors in one or more of the at least sub-plurality of physical qubits based on a measurement from at least one flag qubit.
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