Invention Grant
- Patent Title: Deep trench integration processes and devices
-
Application No.: US16953577Application Date: 2020-11-20
-
Publication No.: US11456171B2Publication Date: 2022-09-27
- Inventor: Lan Yu , Tyler Sherwood
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/06 ; H01L21/762

Abstract:
Exemplary methods of forming a semiconductor structure may include forming a liner along sidewalls of a trench defined from a first surface of a semiconductor substrate. The liner may extend along the first surface of the semiconductor substrate. The methods may include filling the trench with a dielectric material. The methods may include removing the dielectric material and the liner from the first surface of the semiconductor substrate. The methods may include forming a layer of the liner across the first surface of the semiconductor substrate and the trench defined within the semiconductor substrate.
Public/Granted literature
- US20220165564A1 DEEP TRENCH INTEGRATION PROCESSES AND DEVICES Public/Granted day:2022-05-26
Information query
IPC分类: