- Patent Title: Self-aligned gate edge architecture with alternate channel material
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Application No.: US16024125Application Date: 2018-06-29
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Publication No.: US11456357B2Publication Date: 2022-09-27
- Inventor: Biswajeet Guha , Anupama Bowonder , William Hsu , Szuya S. Liao , Mehmet Onur Baykan , Tahir Ghani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L27/092 ; H01L29/06 ; H01L29/16 ; H01L29/161 ; H01L21/8238 ; H01L21/02 ; H01L29/20

Abstract:
Techniques are disclosed for forming integrated circuits configured with self-aligned isolation walls and alternate channel materials. The alternate channel materials in such integrated circuits provide improved carrier mobility through the channel. In an embodiment, an isolation wall is between sets of fins, at least some of the fins including an alternate channel material. In such cases, the isolation wall laterally separates the sets of fins, and the alternate channel material provides improved carrier mobility. For instance, in the case of an NMOS device the alternate channel material is a material optimized for electron flow, and in the case of a PMOS device the alternate channel material is a material optimized for hole flow.
Public/Granted literature
- US20200006487A1 SELF-ALIGNED GATE EDGE ARCHITECTURE WITH ALTERNATE CHANNEL MATERIAL Public/Granted day:2020-01-02
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