Invention Grant
- Patent Title: Prepreg and laminate for circuit board
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Application No.: US17003057Application Date: 2020-08-26
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Publication No.: US11457530B2Publication Date: 2022-09-27
- Inventor: Kazumichi Uchida
- Applicant: KYOCERA Corporation
- Applicant Address: JP Kyoto
- Assignee: KYOCERA Corporation
- Current Assignee: KYOCERA Corporation
- Current Assignee Address: JP Kyoto
- Agency: Volpe Koenig
- Priority: JPJP2018-032996 20180227
- Main IPC: B32B15/14
- IPC: B32B15/14 ; H05K1/03

Abstract:
Provided are: a prepreg with low dielectric constant, low dielectric loss tangent, and improved adhesiveness to glass cloth; and a laminate for a circuit board. The prepreg is formed of the glass cloth serving as a base material and a semi-cured product of a thermosetting resin composition impregnated into the glass cloth, where the glass cloth comprises a treated surface treated by at least one type of silane coupling agent selected from methacryl-based silane coupling agents, acryl-based silane coupling agents, and isocyanate-based silane coupling agents, and the thermosetting resin composition contains polyphenyleneether having a terminal hydroxyl group modified with an ethylenically unsaturated compound in a main chain of the polyphenyleneether. The laminate for the circuit board is obtained by laminating the prepreg and a conductor layer.
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