An information processing apparatus includes a central processing unit (CPU), a plurality of field-programmable gate arrays (FPGAs) connected to the CPU to communicate with the CPU, and a plurality of memories provided in a one-to-one relationship with the plurality of FPGAs. Each of the plurality of memories is configured to store configuration data of a corresponding one of the plurality of FPGAs. One of the plurality of FPGAs is configured to update the configuration data of each of the plurality of FPGAs stored in a corresponding one of the plurality of memories.