Invention Grant
- Patent Title: Multi-stack package-on-package structures
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Application No.: US17026825Application Date: 2020-09-21
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Publication No.: US11462530B2Publication Date: 2022-10-04
- Inventor: Chen-Hua Yu , An-Jhih Su
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/00 ; H01L23/00 ; H01L23/538 ; H01L25/10 ; H01L21/56 ; H01L23/31 ; H01L25/065

Abstract:
A package includes a first device die, and a first encapsulating material encapsulating the first device die therein. A bottom surface of the first device die is coplanar with a bottom surface of the first encapsulating material. First dielectric layers are underlying the first device die. First redistribution lines are in the first dielectric layers and electrically coupling to the first device die. Second dielectric layers are overlying the first device die. Second redistribution lines are in the second dielectric layers and electrically coupling to the first redistribution lines. A second device die is overlying and electrically coupling to the second redistribution lines. No solder region connects the second device die to the second redistribution lines. A second encapsulating material encapsulates the second device die therein. A third device die is electrically coupled to the second redistribution lines. A third encapsulating material encapsulates the third device die therein.
Public/Granted literature
- US20210005594A1 Multi-Stack Package-on-Package Structures Public/Granted day:2021-01-07
Information query
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