Invention Grant
- Patent Title: Semiconductor devices and methods of manufacturing
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Application No.: US16780112Application Date: 2020-02-03
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Publication No.: US11462614B2Publication Date: 2022-10-04
- Inventor: Jhon Jhy Liaw
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/423 ; H01L29/06 ; H01L29/08 ; H01L29/10 ; B82Y40/00

Abstract:
Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. Different thickness in an epi-growth scheme is adopted to create different sheet thicknesses within the same device channel regions for use in manufacturing vertically stacked nanostructure (e.g., nanosheet, nanowire, or the like) GAA devices. A vertically stacked nanostructure GAA device may be formed with a topmost channel region that is thinner than a bottommost channel region. Furthermore, the topmost channel region of the GAA device may be formed with lightly doped drain regions with a highest concentration and/or a greater degree of lateral diffusion of implanted dopants as compared to the bottommost channel region.
Public/Granted literature
- US20210066452A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING Public/Granted day:2021-03-04
Information query
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