Invention Grant
- Patent Title: Three dimensional integrated circuit and fabrication thereof
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Application No.: US16727395Application Date: 2019-12-26
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Publication No.: US11476248B2Publication Date: 2022-10-18
- Inventor: Chenming Hu , Po-Tsang Haung
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. , NATIONAL YANG MING CHIAO TUNG UNIVERSITY
- Applicant Address: TW Hsinchu; TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,NATIONAL YANG MING CHIAO TUNG UNIVERSITY
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,NATIONAL YANG MING CHIAO TUNG UNIVERSITY
- Current Assignee Address: TW Hsinchu; TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L27/12 ; H01L21/02 ; H01L21/822 ; H01L21/8234 ; H01L23/522

Abstract:
An integrated circuit structure includes a first transistor, an interconnect structure, a first dielectric layer, polycrystalline plugs, a semiconductor structure and a second transistor. The first transistor is formed on a substrate. The interconnect structure is over the first transistor. The first dielectric layer is over the interconnect structure. The polycrystalline plugs extend from a top surface of the dielectric layer into the dielectric layer. The semiconductor structure is disposed over the first dielectric layer. The second transistor is formed on the semiconductor structure.
Public/Granted literature
- US20210202475A1 THREE DIMENSIONAL INTEGRATED CIRCUIT AND FABRICATION THEREOF Public/Granted day:2021-07-01
Information query
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