Invention Grant
- Patent Title: Dual channel structure
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Application No.: US16937277Application Date: 2020-07-23
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Publication No.: US11476333B2Publication Date: 2022-10-18
- Inventor: Mrunal Abhijith Khaderbad , Dhanyakumar Mahaveer Sathaiya , Keng-Chu Lin , Tzer-Min Shen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/78 ; H01L29/66 ; H01L21/8238 ; H01L27/092 ; H01L29/06
Abstract:
Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a channel member including a first channel layer and a second channel layer over the first channel layer, and a gate structure over the channel member. The first channel layer includes silicon, germanium, a III-V semiconductor, or a II-VI semiconductor and the second channel layer includes a two-dimensional material.
Public/Granted literature
- US20210305372A1 Dual Channel Structure Public/Granted day:2021-09-30
Information query
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