Invention Grant
- Patent Title: Method and apparatus for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs)
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Application No.: US16692389Application Date: 2019-11-22
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Publication No.: US11493945B1Publication Date: 2022-11-08
- Inventor: Longfei Wang , S. Karen Khatamifard , Ulya R. Karpuzcu , Selçuk Köse
- Applicant: University of South Florida , REGENTS OF THE UNIVERSITY OF MINNESOTA
- Applicant Address: US FL Tampa; US MN Minneapolis
- Assignee: University of South Florida,REGENTS OF THE UNIVERSITY OF MINNESOTA
- Current Assignee: University of South Florida,REGENTS OF THE UNIVERSITY OF MINNESOTA
- Current Assignee Address: US FL Tampa; US MN Minneapolis
- Agency: Quarles & Brady LLP
- Main IPC: G05F1/00
- IPC: G05F1/00 ; G05F1/59 ; G05F1/575

Abstract:
An apparatus and method are provided for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs) caused by the effects of aging on the power transistors of the DLDO, such as by the effects of negative bias temperature instability (NBTI)-induced aging, for example. The apparatus comprises a shift register for use in a DLDO that is configured to activate and deactivate power transistors of the DLDO to evenly distribute electrical stress among the transistors in a way that mitigates performance degradation of the DLDO under various load current conditions. In addition, the shift register and methodology can be implemented in such a way that nearly no extra power and area overhead are consumed.
Information query
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