A storage device having improved operation speed may include a main memory configured to store first to N-th meta data, a cache memory including first to N-th dedicated areas respectively corresponding to areas in which the first to N-th meta data are stored, and a processor configured to store data accessed according to requests provided from a host among the first to N-th meta data in the first to N-th dedicated areas, respectively. A size of the first to N-th dedicated areas may be determined according to the number of times each of the first to N-th meta data is accessed by the requests.