The present technology relates to an electronic device. A memory device capable of reducing a time consumed in a program operation includes a memory cell array, a page buffer group connected to the memory cell array through a plurality of bit lines and a voltage generator configured to generate voltages to apply to each of a plurality of page buffers included in the page buffer group. Each of the plurality of page buffers includes a precharge circuit that controls potential levels of the plurality of bit lines to be maintained at precharge levels.