Invention Grant
- Patent Title: Three-dimensional memory devices with architecture of increased number of bit lines
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Application No.: US16953360Application Date: 2020-11-20
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Publication No.: US11502099B2Publication Date: 2022-11-15
- Inventor: Jun Liu , Lei Xue
- Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Applicant Address: CN Wuhan
- Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Current Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Wuhan
- Agency: Bayes PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L21/28 ; H01L27/11565 ; H01L27/1157 ; H01L27/11573 ; G11C7/18

Abstract:
Embodiments of a three-dimensional (3D) memory device and fabrication method thereof are disclosed. The 3D memory device has an architecture with an increased number of bit lines. In an example, a stack structure is formed above a substrate. A plurality of memory strings each extending vertically through a memory region of the stack structure are formed. A plurality of bit lines are formed over the plurality of memory strings, such that at least one of the plurality of bit lines is electrically connected to a single one of the plurality of memory strings.
Public/Granted literature
- US20210091110A1 THREE-DIMENSIONAL MEMORY DEVICES WITH ARCHITECTURE OF INCREASED NUMBER OF BIT LINES Public/Granted day:2021-03-25
Information query
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