An integrated circuit with a power-on-reset circuit includes an inverter circuit connected between the first and second supply node, a cascode-connected series of transistors MCn, for n going from 1 to N, connected between the first supply node and the input node of the inverter, and a resistive element connected between the input node of the inverter and the second supply node. The transistors in the cascode-connected series of transistors MCn pull up the input node voltage above a trip point voltage when the voltage between the input node and the first supply node is more than a threshold of the cascode-connected series. A circuit connected between the first and second supply nodes is responsive to a POR pulse output by the inverter.