Invention Grant
- Patent Title: Variable resistance memory device
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Application No.: US17198495Application Date: 2021-03-11
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Publication No.: US11508424B2Publication Date: 2022-11-22
- Inventor: Kosuke Hatsuda
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: Kioxia Corporation
- Current Assignee: Kioxia Corporation
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz & Volek PC
- Priority: JPJP2020-157866 20200918
- Main IPC: G11C11/16
- IPC: G11C11/16

Abstract:
A first memory cell is coupled to first and third interconnects. A second memory cell is coupled to second and fourth interconnects. A first sense amplifier has a first terminal coupled to the first interconnect and a node of a first potential and a second terminal located close to a node of a second potential and coupled to the third interconnect and has a potential difference between the first and second terminals. A second sense amplifier has a third terminal coupled to the fourth interconnect and a node of a third potential and a fourth terminal located close to a node of a fourth potential and coupled to the second interconnect and has a potential difference between the third and fourth terminals.
Public/Granted literature
- US20220093147A1 VARIABLE RESISTANCE MEMORY DEVICE Public/Granted day:2022-03-24
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