Invention Grant
- Patent Title: Semiconductor on insulator structure comprising a buried high resistivity layer
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Application No.: US16721061Application Date: 2019-12-19
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Publication No.: US11508612B2Publication Date: 2022-11-22
- Inventor: Igor Peidous , Andrew M Jones , Srikanth Kommu , Horacio Josue Mendez
- Applicant: GlobalWafers Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/84 ; H01L21/762 ; H01L23/522 ; H01L27/12 ; H01L29/04 ; H01L29/78
Abstract:
A cost effective process flow for manufacturing semiconductor on insulator structures is parallel is provided. Each of the multiple semiconductor-on-insulator composite structures prepared in parallel comprises a charge trapping layer (CTL).
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