Invention Grant
- Patent Title: Electronic devices mitigating degradation of MOS transistors
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Application No.: US17158789Application Date: 2021-01-26
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Publication No.: US11514978B2Publication Date: 2022-11-29
- Inventor: Woongrae Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2020-0100978 20200812
- Main IPC: G11C11/4096
- IPC: G11C11/4096 ; G11C11/4078 ; G11C11/4074 ; G11C11/406

Abstract:
An electronic device includes a flag generation circuit and a delay circuit. The flag generation circuit is configured to generate a flag signal, wherein a level of the flag signal changes based on a first internal command. The delay circuit is configured to generate a delay signal by delaying one of an operation signal and the flag signal by a predetermined period according to whether a predetermined operation is performed.
Information query
IPC分类: