Package substrate and manufacturing method thereof
Abstract:
A method for manufacturing a package substrate, includes: providing a glass frame having a through hole and a chip embedding cavity; fixing an electronic component in the chip embedding cavity; coating a dielectric layer to an upper surface of the glass frame, the through hole and the chip embedding cavity and curing the dielectric layer; photoetching the dielectric layer to form an opening window arranged above the through hole; depositing metal through the opening window and patterning the metal to form a metal pillar and a circuit layer, the metal pillar passing through the through hole, the circuit layer being arranged on the upper surface and/or a lower surface of the glass frame and being connected to the electronic component and the metal pillar; forming a solder mask on a surface of the circuit layer, patterning the solder mask to form a pad connected to the circuit layer.
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