Invention Grant
- Patent Title: Silicon rich nitride layer between a plurality of semiconductor layers
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Application No.: US17232201Application Date: 2021-04-16
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Publication No.: US11515411B2Publication Date: 2022-11-29
- Inventor: Yosuke Kajiwara , Daimotsu Kato , Masahiko Kuraguchi
- Applicant: KABUSHIKI KAISHA TOSHIBA , TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Applicant Address: JP Minato-ku; JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee: KABUSHIKI KAISHA TOSHIBA,TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
- Current Assignee Address: JP Minato-ku; JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPJP2018-137963 20180723
- Main IPC: H01L31/0256
- IPC: H01L31/0256 ; H01L21/31 ; H01L21/469 ; H01L29/778 ; H01L29/205 ; H01L29/20 ; H01L29/423 ; H01L29/51 ; H01L29/66 ; H01L21/28 ; H01L21/02

Abstract:
According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor layers, a nitride layer, and an oxide layer. A direction from the second electrode toward the first electrode is aligned with a first direction. A position in the first direction of the third electrode is between the first electrode and the second electrode in the first direction. The first semiconductor layer includes first to fifth partial regions. The first partial region is between the fourth and third partial regions in the first direction. The second partial region is between the third and fifth partial regions in the first direction. The nitride layer includes first and second nitride regions. The second semiconductor layer includes first and second semiconductor regions. The oxide layer includes silicon and oxygen. The oxide layer includes first to third oxide regions.
Public/Granted literature
- US20210234032A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2021-07-29
Information query
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