Channel availability information associated with data traffic between a Master and a Slave within an interconnection network (“ICN”) in a System-on-Chip (“SoC”) is monitored by a channel performance monitor in order to improve the performance of the ICN. The channel availability information is fed back to certain Masters to control their data traffic into the ICN. The channel performance monitor monitors and evaluates the data traffic handled by switches within the ICN that can potentially interfere with communication paths between particular Masters and Slaves, and control the initiation of data traffic from predetermined Masters.