Invention Grant
- Patent Title: MRAM device having self-aligned shunting layer
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Application No.: US16724710Application Date: 2019-12-23
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Publication No.: US11522009B2Publication Date: 2022-12-06
- Inventor: William J. Gallagher , Shy-Jay Lin , Ming Yuan Song
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/02 ; H01L27/22 ; H01L43/14 ; H01L43/04

Abstract:
Various embodiments of the present disclosure are directed towards a memory device including a shunting layer overlying a spin orbit torque (SOT) layer. A magnetic tunnel junction (MTJ) structure overlies a semiconductor substrate. The MTJ structure includes a free layer, a reference layer, and a tunnel barrier layer disposed between the free and reference layers. A bottom electrode via (BEVA) underlies the MTJ structure, where the BEVA is laterally offset from the MTJ structure by a lateral distance. The SOT layer is disposed vertically between the BEVA and the MTJ structure, where the SOT layer continuously extends along the lateral distance. The shunting layer extends across an upper surface of the SOT layer and extends across at least a portion of the lateral distance.
Public/Granted literature
- US20210036054A1 MRAM DEVICE HAVING SELF-ALIGNED SHUNTING LAYER Public/Granted day:2021-02-04
Information query
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