Invention Grant
- Patent Title: Micro-fabricated, stress-engineered members formed on passivation layer of integrated circuit
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Application No.: US17208322Application Date: 2021-03-22
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Publication No.: US11527420B2Publication Date: 2022-12-13
- Inventor: Christopher L. Chua , Qian Wang , Eugene M. Chow
- Applicant: Palo Alto Research Center Incorporated
- Applicant Address: US CA Palo Alto
- Assignee: Palo Alto Research Center Incorporated
- Current Assignee: Palo Alto Research Center Incorporated
- Current Assignee Address: US CA Palo Alto
- Agency: Mueting Raasch Group
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/532 ; H01L23/29 ; H01L23/31 ; H01L23/482 ; H01L23/00
Abstract:
A release layer is formed on a surface of an integrated circuit wafer. The surface is passivated and includes metal contact materials. A stress-engineered film having an intrinsic stress profile is deposited over the release layer. The stress-engineered film is patterned and the release layer is undercut etched so that a released portion of the patterned stress-engineered film is released from the surface while leaving an anchor portion fixed to the surface. The intrinsic stress profile in the stress-engineered film biases the released portion away from the surface. The released portion is placed entirely within an area defined by the metal contact material.
Public/Granted literature
- US20220301891A1 MICRO-FABRICATED, STRESS-ENGINEERED MEMBERS FORMED ON PASSIVATION LAYER OF INTEGRATED CIRCUIT Public/Granted day:2022-09-22
Information query
IPC分类:
