Invention Grant
- Patent Title: Hybrid ball grid array package for high speed interconnects
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Application No.: US16984173Application Date: 2020-08-04
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Publication No.: US11527463B2Publication Date: 2022-12-13
- Inventor: Bok Eng Cheah , Jenny Shio Yin Ong , Seok Ling Lim , Kooi Chi Ooi , Jackson Chung Peng Kong
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Viering, Jentschura & Partner MBB
- Priority: MYPI2020002630 20200527
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/522

Abstract:
According to various examples, a semiconductor package is described including a substrate raiser with interconnect vias that may be positioned on the bottom side of a substrate and mini solder balls positioned on the interconnect vias and a plurality of large solder balls positioned on the bottom side of the substrate adjacent to the substrate raiser, wherein the mini solder balls and the large solder balls extend approximately a same height from the substrate for mounting on a printed circuit board.
Public/Granted literature
- US20210375735A1 HYBRID BALL GRID ARRAY PACKAGE FOR HIGH SPEED INTERCONNECTS Public/Granted day:2021-12-02
Information query
IPC分类: