Invention Grant
- Patent Title: System and method for reducing resistance in anti-fuse cell
-
Application No.: US16732214Application Date: 2019-12-31
-
Publication No.: US11527541B2Publication Date: 2022-12-13
- Inventor: Meng-Sheng Chang , Chia-En Huang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Foley & Lahdneh LLP
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L27/112 ; H01L23/525 ; G11C17/16
Abstract:
A memory device includes an anti-fuse cell array having a plurality of anti-fuse cells, each of the plurality of anti-fuse cells having a first transistor and a second transistor connected to the first transistor. A first terminal of the first transistor is connected to a bit line and the bit line is a buried rail formed in a substrate of the first transistor and the second transistor.
Public/Granted literature
- US20210202504A1 System and Method for Reducing Resistance in Anti-Fuse Cell Public/Granted day:2021-07-01
Information query
IPC分类:
