Invention Grant
- Patent Title: Self-aligned spacers and method forming same
-
Application No.: US17066751Application Date: 2020-10-09
-
Publication No.: US11532515B2Publication Date: 2022-12-20
- Inventor: Yi-Tsang Hsieh , Cha-Hsin Chao , Yi-Wei Chiu , Li-Te Hsu , Ying Ting Hsia
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/768 ; H01L29/78 ; H01L29/417 ; H01L23/485 ; H01L23/528 ; H01L29/06

Abstract:
A method includes forming a bottom source/drain contact plug in a bottom inter-layer dielectric. The bottom source/drain contact plug is electrically coupled to a source/drain region of a transistor. The method further includes forming an inter-layer dielectric overlying the bottom source/drain contact plug. A source/drain contact opening is formed in the inter-layer dielectric, with the bottom source/drain contact plug exposed through the source/drain contact opening. A dielectric spacer layer is formed to have a first portion extending into the source/drain contact opening and a second portion over the inter-layer dielectric. An anisotropic etching is performed on the dielectric spacer layer, and a remaining vertical portion of the dielectric spacer layer forms a source/drain contact spacer. The remaining portion of the source/drain contact opening is filled to form an upper source/drain contact plug.
Public/Granted literature
- US20210028062A1 Self-Aligned Spacers and Method Forming Same Public/Granted day:2021-01-28
Information query
IPC分类: