Invention Grant
- Patent Title: Potential generating circuit, inverter, delay circuit, and logic gate circuit
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Application No.: US17404149Application Date: 2021-08-17
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Publication No.: US11550350B2Publication Date: 2023-01-10
- Inventor: Lei Zhu , Zhiyong Chen , Jinlai Luo
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Cooper Legal Group, LLC
- Priority: CN202011340780.6 20201125
- Main IPC: G05F1/575
- IPC: G05F1/575 ; H03K19/08 ; H03K5/01 ; H03K5/00

Abstract:
A potential generating circuit includes a first transistor and a second transistor. Potential at a substrate of the first transistor varies with a first parameter. The first parameter is any one of a supply voltage, an operating temperature, as well as a manufacturing process of the potential generating circuit. Potential at a substrate of the second transistor varies with the first parameter. A gate of the first transistor is connected to a drain of the first transistor. The substrate of the first transistor serves as a first output of the potential generating circuit. A gate of the second transistor is connected to a drain of the second transistor. The substrate of the second transistor serves as a second output of the potential generating circuit.
Public/Granted literature
- US20220163987A1 POTENTIAL GENERATING CIRCUIT, INVERTER, DELAY CIRCUIT, AND LOGIC GATE CIRCUIT Public/Granted day:2022-05-26
Information query
IPC分类: