Invention Grant
- Patent Title: Zone-aware memory management in memory subsystems
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Application No.: US16946377Application Date: 2020-06-18
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Publication No.: US11550727B2Publication Date: 2023-01-10
- Inventor: Amit Bhardwaj
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/02

Abstract:
Disclosed is a system including a memory device having a plurality of physical memory blocks and associated with a logical address space that comprises a plurality of zones, wherein each zone comprises a plurality of logical block addresses (LBAs), and a processing device, operatively coupled with the memory device, to perform operations of receiving a request to store data referenced by an LBA associated with a first zone of the plurality of zones, obtaining a version identifier of the first zone, obtaining erase values for a plurality of available physical memory blocks of the memory device, selecting, in view of the version identifier of the first zone and the erase values, a first physical memory block of the plurality of available physical memory blocks, mapping a next available LBA within the first zone to the first physical memory block, and storing the data in the first physical memory block.
Public/Granted literature
- US20210397562A1 ZONE-AWARE MEMORY MANAGEMENT IN MEMORY SUB-SYSTEMS Public/Granted day:2021-12-23
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