Invention Grant
- Patent Title: Apparatus and method for quantum performance and/or error correction enhancement using multi-qubit gates
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Application No.: US16261113Application Date: 2019-01-29
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Publication No.: US11550977B2Publication Date: 2023-01-10
- Inventor: Sahar Daraeizadeh , Anne Matsuura , Xiang Zou , Sonika Johri
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F30/30 ; G06N10/00 ; G11C29/52 ; G06F11/10 ; G06N10/70

Abstract:
Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.
Public/Granted literature
- US20200242208A1 APPARATUS AND METHOD FOR QUANTUM PERFORMANCE AND/OR ERROR CORRECTION ENHANCEMENT USING MULTI-QUBIT GATES Public/Granted day:2020-07-30
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