Invention Grant
- Patent Title: Voltage offset for compute-in-memory architecture
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Application No.: US16864005Application Date: 2020-04-30
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Publication No.: US11551759B2Publication Date: 2023-01-10
- Inventor: Edward Harrison Teague , Zhongze Wang , Max Welling
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Edward J. Meisarosh
- Main IPC: G11C7/16
- IPC: G11C7/16 ; G11C16/24 ; G11C16/26 ; G11C16/10 ; G11C7/10 ; G11C16/08

Abstract:
In one embodiment, an electronic device includes a compute-in-memory (CIM) array that includes a plurality of columns. Each column includes a plurality of CIM cells connected to a corresponding read bitline, a plurality of offset cells configured to provide a programmable offset value for the column, and an analog-to-digital converter (ADC) having the corresponding bitline as a first input and configured to receive the programmable offset value. Each CIM cell is configured to store a corresponding weight.
Public/Granted literature
- US20210343343A1 VOLTAGE OFFSET FOR COMPUTE-IN-MEMORY ARCHITECTURE Public/Granted day:2021-11-04
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