Invention Grant
- Patent Title: Method for forming an electrical connection between an electronic chip and a carrier substrate and electronic device
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Application No.: US16835793Application Date: 2020-03-31
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Publication No.: US11557566B2Publication Date: 2023-01-17
- Inventor: David Auchere , Asma Hajji , Fabien Quercia , Jerome Lopez
- Applicant: STMicroelectronics (Grenoble 2) SAS
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Crowe & Dunlevy
- Priority: FR1660622 20161103,FR1660623 20161103,FR1660624 20161103
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/00 ; H01L23/552

Abstract:
An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
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