Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
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Application No.: US17115204Application Date: 2020-12-08
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Publication No.: US11557648B2Publication Date: 2023-01-17
- Inventor: Hiroshi Yanagigawa , Katsumi Eikyu , Masami Sawada , Akihiro Shimomura , Kazuhisa Mori
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2020-004433 20200115
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; H01L29/78

Abstract:
In a trench gate type power MOSFET having a super-junction structure, both improvement of a breakdown voltage of a device and reduction of on-resistance are achieved. The trench gate and a column region are arranged so as to be substantially orthogonal to each other in a plan view, and a base region (channel forming region) and the column region are arranged separately in a cross-sectional view.
Public/Granted literature
- US20210217844A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2021-07-15
Information query
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