Invention Grant
- Patent Title: Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor
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Application No.: US16590106Application Date: 2019-10-01
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Publication No.: US11563084B2Publication Date: 2023-01-24
- Inventor: Edward John Coyne , Alan Brannick , Shane Tooher , Breandán Pol Og Ó hAnnaidh , Catriona Marie O'Sullivan , Shane Patrick Geary
- Applicant: Analog Devices International Unlimited Company
- Applicant Address: IE Limerick
- Assignee: Analog Devices International Unlimited Company
- Current Assignee: Analog Devices International Unlimited Company
- Current Assignee Address: IE Limerick
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L21/8228 ; H01L27/082 ; H01L29/66 ; H01L29/732
Abstract:
A bipolar junction transistor is provided with an emitter structure that is positioned above the upper surface of the base region. The thickness of the emitter and the interfacial oxide thickness between the emitter and the base is configured to optimize a gain for a given type of transistor. A method of fabricating PNP and NPN transistors on the same substrate using a complementary bipolar fabrication process is provided. The method enables the emitter structure for the NPN transistor to be defined separately to that of the PNP transistor. This is achieved by epitaxially growing the emitter layer for the PNP transistor and growing the emitter layer for the NPN transistor in a thermal furnace.
Public/Granted literature
- US20210098574A1 BIPOLAR JUNCTION TRANSISTOR, AND A METHOD OF FORMING AN EMITTER FOR A BIPOLAR JUNCTION TRANSISTOR Public/Granted day:2021-04-01
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