Invention Grant
- Patent Title: Using internal block variables and known pattern information to perform dynamic erase operation in non-volatile memory
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Application No.: US16625587Application Date: 2019-05-31
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Publication No.: US11568942B2Publication Date: 2023-01-31
- Inventor: Antonino Mondello , Alberto Troia
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- International Application: PCT/IB2019/000477 WO 20190531
- International Announcement: WO2020/240234 WO 20201203
- Main IPC: G11C16/16
- IPC: G11C16/16 ; G11C16/34 ; G11C16/28

Abstract:
The abstract of the disclosure was objected to because of informality (e.g. format, reference to figures, etc.). See MPEP § 608.01 (b). Please amend the abstract to recite: Non-volatile memory device may include at least an array of memory cells. The non-volatile memory cells may include associated decoding and sensing circuitry and a memory controller. Methods for checking the erasing phase of a non-volatile device may include performing a dynamic erase operation of at least a memory block and storing in a dummy row at least an internal block variable of the dynamic erase operation and/or a known pattern.
Public/Granted literature
- US20210407601A1 METHOD FOR CHECKING THE ERASING PHASE OF A MEMORY DEVICE Public/Granted day:2021-12-30
Information query