Invention Grant
- Patent Title: Parallel access to volatile memory by a processing device for machine learning
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Application No.: US16127850Application Date: 2018-09-11
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Publication No.: US11574659B2Publication Date: 2023-02-07
- Inventor: Gil Golov
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Greenberg Traurig
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C7/22 ; G06N3/08 ; G06N20/00 ; G06N3/02 ; G06N3/04

Abstract:
A memory system having a processing device (e.g., CPU) and memory regions (e.g., in a DRAM device) on the same chip or die. The memory regions store data used by the processing device during machine learning processing (e.g., using a neural network). One or more controllers are coupled to the memory regions and configured to: read data from a first memory region (e.g., a first bank), including reading first data from the first memory region, where the first data is for use by the processing device in processing associated with machine learning; and write data to a second memory region (e.g., a second bank), including writing second data to the second memory region. The reading of the first data and writing of the second data are performed in parallel.
Public/Granted literature
- US20200082852A1 Parallel Access to Volatile Memory by A Processing Device for Machine Learning Public/Granted day:2020-03-12
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